jobs in the wild.

ASIC Verification 🔹 Senior Staff ASIC Verification Engineer (UVM, IP/SoC DV, Tape-out) 🔹 Principal ASIC Verification Engineer (Verification Architecture, SoC DV, Methodology) 🔹 Senior Staff Digital Verification Engineer (AMS Verification, SystemVerilog, Serial Transceivers) ASIC & IC Design 🔹 Principal ASIC Design Engineer (DSP, RTL, Modem Algorithms, SoC Integration) 🔹 Principal IC Design Engineer (PMIC, PoL, Power Management, Analog IC) 🔹 Staff RF/MS IC Design Engineer (RF, Mixed-Signal, PLL, Rx/Tx) Physical Design 🔹 Senior Staff Place and Route Engineer (Floorplanning, CTS, Timing Closure, Signoff) Design Automation 🔹 Senior Staff Design Automation Engineer (EDA, Digital Flows, Python, Tcl) 🔹 Senior Design Automation Engineer (EDA, Digital Flows, Python, Tcl) Systems, Test & Firmware 🔹 Principal Systems Integration and Test Engineer (System Bring-up, Validation, Network/Packet Processing) 🔹 Senior Staff Systems Integration and Test Engineer (System Validation, Automation, PHY/DSP, Embedded) 🔹 Staff Systems Validation Engineer (Post-Silicon Validation, Lab Debug, Interface/Power) 🔹 Staff Firmware Engineer (VoIP, Embedded Firmware, Linux, Telephony DSP) If you are a fit or know someone relevant, please share the resume by DM with the role name. #MaxLinear #BangaloreJobs #SemiconductorJobs #ASIC #Verification #PhysicalDesign #EDA #RFIC #AnalogIC #DSP #Firmware #EmbeddedSystems #SystemValidation #VLSI #Semiconductor #SemiconductorIndustry #ChipDesign #HardwareEngineering #Silicon #Microelectronics #ASIC #ASICDesign #RTLDesign #DigitalDesign #SoCDesign #SystemOnChip #DesignVerification #ASICVerification #SystemVerilog #UVM #FunctionalVerification #FormalVerification #PhysicalDesign #RTLtoGDS #PnR #STA #PhysicalVerification #LayoutDesign #Synthesis #SerDes #HighSpeedIO #AnalogMixedSignal #AnalogDesign #PHY #SignalIntegrity #VLSIBangalore #BangaloreTech #NammaBengaluru #BangaloreJobs #SiliconValleyOfIndia #VLSIHiring #SemiconductorJobs #Hiring