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Engineering Leader | Program Strategist | Delivered billion-dollar AI and SoC platforms | Cross-Functional Leadership | Power & Performance Optimization | OEM Management | Data centers | Release quality Management · NVIDIA
16d ago

Chip Design Verification EngineerNVIDIA

NVIDIA is hiring across silicon, systems, AI and software, and we are still searching for candidates. An update first. Within Last week, I have read 93 resumes and matched each against the open roles in my team and then against other open roles across Org, working with hiring managers in other orgs where the best fit sat elsewhere. 37 people have been put forward for 145 different roles so far, and more matches are in progress. Here is where we are inviting resumes now: → Chip design and verification. Senior chip design verification, ASIC design, PCIe verification. → Physical design, circuits and packaging. Mixed-signal, SRAM and circuit design, signal and power integrity, package layout. → Silicon validation and DFT. High-speed IO and SerDes validation, mixed-signal validation, DFT methodology. → AI software and inference. Deep learning inference and compilers, performance architects, MLOps, generative and agentic AI. → Datacenter, DGX Cloud and reliability. Distributed systems, storage platforms, attestation, SRE, datacenter debug. → System software, CUDA, drivers and firmware. GPU tools, DRIVE OS, firmware, CUDA test development. Santa Clara, Bengaluru, Pune → Networking and interconnect. NVLink, switch and DPU software, network verification, GPU networking architecture. → Autonomous vehicles and robotics. AV platform software, perception ML, safety (Halos), humanoid robotics, Omniverse. → Solutions architecture and developer relations. Generative AI, inference deployment, cloud partners → Technical program and product management. Hardware NPI, software platforms, AI datacenter programs, AI frameworks product. Locations: Santa Clara is the largest hub, plus Austin, Hillsboro, Seattle, Westford, Durham and remote seats. Bengaluru, Pune. Most seats are senior, 5 to 10 years. If you think you are a match for the roles, Please send in your resume. #NVIDIA #Hiring #NowHiring #Semiconductor #Semiconductors #AI #ArtificialIntelligence #GPU #GPUComputing #AcceleratedComputing #DataCenter #CUDA #HPC #DeepLearning #MachineLearning #GenerativeAI #AgenticAI #LLM #AIInfrastructure #AIChips #ASIC #VLSI #ChipDesign #SoC #RTL #DesignVerification #UVM #SystemVerilog #PhysicalDesign #MixedSignal #SRAM #SignalIntegrity #PowerIntegrity #DFT #SiliconValidation #PostSilicon #HighSpeedIO #SerDes #PCIe #NVLink #Networking #InfiniBand #DPU #DGXCloud #SRE #Firmware #EmbeddedSystems #SystemSoftware #Compilers #AutonomousVehicles #Robotics #ProgramManagement #TPM #SolutionsArchitect #TechCareers #EngineeringJobs #JobOpening #Recruiting #SantaClara #SeniorEngineer #ASICDesign #DigitalDesign #RTLDesign #LogicDesign #FormalVerification #VerificationEngineer #ChipVerification #ASICVerification #SoCVerification #IPDesign #Verilog #ClockDesign #CDC #ASICEngineer #HardwareEngineer #HardwareDesign #DigitalIC #IntegratedCircuits #HBM #HBM3 #LPDDR #DRAM #MemorySystems #PostSiliconValidation #PreSilicon #SiliconBringup #SiliconDebug #DesignForTest #ATE
tal saysnvidia is hiring senior chip design verification engineers in bangalore and global hubs
engineering senior Bangalore public systemveriloguvmpcieasic
4
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Chip Design Verification Engineer Sumit Bansal · NVIDIA
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